• Some experience in one or more HDL language (System Verilog, Verilog), and one or more scripting language (TCL, Python, Perl, Shell-scripting
  • Some experience with SoC design methodologies that involve multiple clock domains, clock power management and system debug.
  • Modeling: experience in C/C++/SystemC
  • Preferably have some hands on experience with VIVADO and Xilinx FPGAs.
  • Preferably some networking protocol understanding
  • Familiar with Linux kernel, IPC, and device driver model.
  • Familiar with various hardware elements of latest data center environment.
  • Familiar with embedded systems software stack.
  • Familiarity with OVS and PCIe drivers.
  • Some Understanding of DPDK/SRIOV protocol
  • Min 2-3 years Experience in C/C++

Job Details

Total Positions:
10 Posts
Job Shift:
First Shift (Day)
Job Type:
Job Location:
Gender:
No Preference
Minimum Education:
Bachelors
Career Level:
Experienced Professional
Experience:
1 Year - 3 Years
Apply Before:
Dec 02, 2019
Posting Date:
Oct 31, 2019

Lemon Communication

Information Technology · 1-10 employees - Islamabad, Karachi

Lemon Communication

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